A metal-oxide semiconductor field-effect transistor (i.e., MOSFET) provided by a silicon carbide substrate (i.e., SiC substrate) has been studied. It is required that the MOSFET works in normally-off operation. Here, the normally-off operation is that no current flows in the MOSFET when a gate voltage is null. However, the MOSFET formed of SiC substrate (e.g., 4H-SiC) has less mobility and less reliability so that the MOSFET is short of performance.
On the other hand, a junction field-effect transistor (i.e., JFET) provided by SiC substrate according to a prior art is disclosed, for example, in U.S. Pat. No. 5,396,085. This JFET is formed of SiC substrate, and works in normally-on operation. Here, the normally-on operation is that a predetermined current flows in the JFET when a gate voltage is null. The JFET has high withstand voltage and low ON-state resistance. Further, a semiconductor device disclosed in the above patent is composed of the JFET and a MOSFET. The JFET is a normally-on operation type transistor and formed of SiC substrate, and the MOSFET has a low withstand voltage and formed of silicon substrate (i.e., Si), so that the device totally works in normally-off operation. Specifically, the MOSFET (i.e., Si-MOSFET) provides high withstand voltage in case of a comparatively low drain voltage (i.e., a low inverse-bias voltage). The JFET (i.e., SiC-JFET) provides high withstand voltage in case of a comparatively high drain voltage (i.e., a high inverse-bias voltage) by expanding a depletion layer in the SiC-JFET.
However, the above device is composed of two transistors, and one is formed of Si substrate and the other is formed of SiC substrate. Accordingly, the device is necessitated to have two chips, i.e., a Si chip and a SiC chip. Therefore, a package for accommodating the device becomes large, and conduction loss of a wiring in the device becomes large. Further, since the device includes the Si-MOSFET, the device does not work in high temperature atmosphere, for example, at a temperature higher than 200° C.
Another device is disclosed in Japanese Unexamined Patent Application publication No. 2003-31591 (i.e., U.S. Pat. No. 6,576,929). The device is composed of two vertical type JFETs combined and integrated in a same substrate made of SiC. One JFET works in a normally-on operation and the other JFET works in a normally-off operation, so that the device totally works in a normally-off operation. However, the device has a complicated construction so that a manufacturing cost of the device becomes large. Further, production tolerance of the device becomes large.